Astrus

Analog and mixed-signal (AMS) layout at advanced semiconductor nodes is the hidden bottleneck in modern chip design. At 3nm and 2nm, a single high-speed SerDes block can take a senior layout engineer 8-16 weeks of hand-crafted work, followed by multiple extraction-driven re-spins, and the engineers capable of doing it simply do not exist in sufficient numbers. Astrus breaks this bottleneck. Astrus is a purpose-built physical intelligence engine that automates analog layout generation using deep reinforcement learning. Its AI research lineage traces to Rich Sutton and the same foundational breakthroughs that powered AlphaGo and AlphaZero. Rather than learning from human training data, the Astrus engine masters the "game" of layout through self-play inside a physics-accurate simulator of the PDK, exploring millions of geometric permutations to produce results that match or exceed expert-level human performance, out of the box, on day one. The workflow fits directly into your existing EDA environment. Designers bring their schematic and layout guide from Cadence or Synopsys, set parasitic and performance targets (resistance, capacitance, wire matching, device matching), and let Astrus generate top-ranked layout candidates. Outputs are DRC-clean, LVS-clean, and parasitic-aware, pre-tested against all standard verification tools, and delivered in industry-standard file formats including .oa and .gds via our Si2 partnership. Results load back into Cadence and Synopsys environments without friction. Astrus is FinFET-native and designed specifically for the rigid geometric constraints of modern advanced nodes from TSMC and Samsung. It specializes in the highest-value, highest-complexity AMS blocks, including SerDes, PLL, charge pumps, and other high-speed interconnect circuits, where automation has historically been impossible and the cost of schedule delay is measured in hundreds of millions of dollars of pulled-forward revenue. Instead of iterating five times a week, your team iterates five times a day. Security and data sovereignty are built into the platform from the ground up. Because the Astrus engine learns through self-play rather than from customer IP, your proprietary designs are never used as training data. Deployment options include the Astrus Secure Chamber or Bring Your Own Cloud (BYOC), meeting the isolation standards required by leading semiconductor companies worldwide. Astrus is currently selecting pilot partners from among the world's leading AI silicon and semiconductor companies. If your team is working on an advanced-node AMS layout and schedule is on the critical path, Astrus is built for you.