Vivado ML 2024.2 Developer AMI

My main use case for AMD Vivado Design Suite is the design of FPGAs for educational purposes and also for solving contracting problems for interfacing chips.

In a recent project, I used AMD Vivado Design Suite to synthesize an arbitrary-size arithmetic logic unit. I used AMD Vivado Design Suite and a custom Verilog generator to implement the design on Basys 3 and other FPGA boards.

AMD Vivado Design Suite has impacted my organization positively, as it was possible to implement projects that would not work otherwise. I could achieve the demo that I was running with AMD Vivado Design Suite. This was the only way to do that, as other tools would not work.

AMD Vivado Design Suite could be modernized so it does not function as a 1970s tool, particularly in the areas of technology mapping, placement, and routing where it could perform more intelligent synthesis and optimization in the loop.

The entire IP Integrator needs to be redone. The graphical user interface for IP integration is a disaster and needs to be rewritten from scratch. The classical toolchain, placement and routing are quite poor. The technology mapping is not good. The Verilog compiler is also inadequate. Error logging is poor, and the debugging methods and overall analysis are also substandard. The integration with simulation is poor.

The user interface of AMD Vivado Design Suite is really bad because it is sluggish and slow. It is written in Java and does not work well on Linux. It does not support Linux platforms. Documentation is acceptable.

I have been using AMD Vivado Design Suite for several years. Before that, I used Xilinx, the predecessors of AMD Vivado Design Suite, so I have been witnessing the WebPACK and the whole evolution.

The accuracy and reliability of output when using AMD Vivado Design Suite have been consistent for me. AMD Vivado Design Suite is stable.

The scalability of AMD Vivado Design Suite is poor. Due to the nature of the algorithms themselves, it is very difficult to run on multiple CPUs and over a network. It does perform some parallel processing, but it does not scale properly.

I have used Altera in the past, but I switched because I was working for another organization.

I have not seen a return on investment with AMD Vivado Design Suite, and it is not applicable in this case.

My experience with pricing, setup cost, and licensing is that I use the free version.

My advice to others looking into using AMD Vivado Design Suite is to avoid it if you can. I rate AMD Vivado Design Suite a three on a scale of one to ten because it is quite poor. It is not a total disaster, otherwise I would give it a one. AMD Vivado Design Suite does not have any AI capabilities.

My main use case for AMD Vivado Design Suite involves competitions where we use Genesis 2 boards and the Kintex-7 IC, which is a pure FPGA. It is important because in the market, many FPGAs consist of products by Xilinx AMD. We use AMD Vivado Design Suite when we want to program this FPGA and boards.

In my experience, the best features AMD Vivado Design Suite offers include being easy to use and not complicated, thanks to the Flow Navigator that allows you to access anything and reach anything on the same screen. You are coding on the right, can synthesize, implement, and reach the source easily. Its text editor is greater than the other EDA tools I use, which are Vivado, Libero, Microchip Libero, and Altera Quartus. When I compare it to the other two products, I find AMD Vivado Design Suite better, although I am currently using VS Code and do not even open the AMD Vivado Design Suite text editor because we are writing Tcl, which automates implementation, designs, and design flow. AMD Vivado Design Suite is easier to learn than other EDA tools, although I am not using the AMD Vivado Design Suite text editor currently.

AMD Vivado Design Suite has positively impacted our organization because it is a great tool that makes jobs easier. Additionally, AMD provides versatile IPs that allow you to create your block design, which makes work faster. In AMD Vivado Design Suite, XSim is a simulation software that comes embedded, so we do not need any other simulation tools. It also improves work quality due to its good error feedback, allowing you to return these errors and fix your code easily in the programming process.

Regarding features of AMD Vivado Design Suite, if AMD adds AI, it could enhance the design suite even more because there is currently no AI chat; you must enter VS Code or use the cloud or other AI tools.

AMD Vivado Design Suite can be improved by adding AI.

I have been working in my current field for approximately two years.

AMD Vivado Design Suite is stable in my experience.

AMD Vivado Design Suite's scalability is very good, as it can handle larger or more complex projects well. Currently, we are designing a chip and need to prototype on the FPGA in Genesis boards that include Kintex-7.

I have not experienced any support issues with AMD Vivado Design Suite, but our other engineers and colleagues have reached out for support regarding some issues, and I think their return is very good and the support team is very good.

I did not previously use a different solution before AMD Vivado Design Suite because, depending on the project requirements, if your project needs a Microchip FPGA, you use Libero, and if your project needs a Xilinx FPGA, you use Xilinx. It is not a matter of switching; you simply use what your project needs.

I have seen a return on investment from using AMD Vivado Design Suite because it required fewer people due to its ease of use. You can adapt yourself very easily, and it has improved the quality of our work because its error feedback is very good, allowing for easy error correction and programming.

I believe the pricing, setup cost, and licensing for AMD Vivado Design Suite are good, although I do not have any idea of this because my company solved this problem.

I did not evaluate other options before choosing AMD Vivado Design Suite because I only had one option when I started, which was the Xilinx card, so I had to choose AMD Vivado Design Suite.

I would rate AMD Vivado Design Suite a 7.5 out of 10 because I am currently not using the tool or GUI; I am using Tcl and just writing RTLs.

Regarding AMD Vivado Design Suite's AI capabilities, I think it is a very reliable tool because I trust it.

My advice to others looking into using AMD Vivado Design Suite is to first learn digital design basics and logic basics. You should study them before buying some kits for education, such as Basys 3, or others such as GOWIN if you want something cheaper. You can easily find tutorials on YouTube about VHDL, Verilog, or digital design. Do not directly go into AMD Vivado Design Suite because it can be very complex for first-time users; first, you should understand the basics such as digital design fundamentals and signals and systems.

I have covered everything regarding AMD Vivado Design Suite, and it is sufficient.

My main use case for AMD Vivado Design Suite is that I used Vivado and Vivado HLS during a university FPGA project. We were working on a post-quantum cryptography algorithm called Ring-LWE and targeting a Zynq 7000 ZED board.

A specific example of how I used AMD Vivado Design Suite for that FPGA project is that we used Vivado HLS to convert parts of our C implementation into hardware IP. We experimented with different implementation and optimization parameters to find a good balance between latency, performance, and hardware resource usage. Essentially, we tried to accelerate the encryption and decryption algorithm in the FPGA using Vivado.

What I appreciated most about my use case or the project is having the complete FPGA development workflow with AMD Vivado Design Suite. We could generate an IP with Vivado HLS, integrate it into the design, generate the bitstream, and then program and test the actual hardware. The process is notably easier with Vivado HLS.

The best features AMD Vivado Design Suite offers are quite manageable once I understood the workflow, but initially, there was definitely a learning curve, especially understanding the relationship between HLS, IP generation, the Vivado design, synthesis, implementation, and bitstream generation.

The specific features that stood out the most for me in AMD Vivado Design Suite were the HLS pragmas. For example, we implemented the pipeline easily using the HLS pipeline pragma. We accelerated our algorithm and accomplished it quickly with using that pragma.

AMD Vivado Design Suite has impacted me positively, as it made our implementation easier.

One area that could be improved is the learning curve. Vivado is a very powerful tool, but for someone who is new to FPGA development with Vivado, there are many concepts, settings, and different stages in the workflow to understand.

Synthesis and implementation can take considerable time. When I experiment with many different configurations, the iteration cycle can become quite long. Because when I try to develop something and try different things, I need to wait a long time. This could potentially be improved.

In my opinion, AMD Vivado Design Suite can be improved regarding the user interface. I think the user interface is quite good with the UX elements, but it could be improved further.

Regarding needed improvements for the user interface of AMD Vivado Design Suite, I would consider the perspective of new users. When I learned the Vivado user interface, I became really comfortable with it. However, a new person with Vivado probably needs to learn the user interface first before continuing with their work.

I have been using AMD Vivado Design Suite for two years.

AMD Vivado Design Suite is stable in my experience.

AMD Vivado Design Suite's scalability handles my projects well. For example, I implemented direct memory access, chose some settings, and it arranged itself easily.

I have not interacted with customer support for AMD Vivado Design Suite.

Before choosing AMD Vivado Design Suite, I used ISE Design Suite in university. After that, we continued with AMD Vivado Design Suite and have not used another solution since.

My experience with pricing, setup cost, and licensing for AMD Vivado Design Suite is that I did not have any problems with the setup cost and licensing because I used that project in my master's degree at university. Therefore, my university supported those issues and arranged the licensing and setup costs.

I have seen a return on investment from using AMD Vivado Design Suite, particularly in terms of time saved. We used Vivado HLS to develop our program with the C programming language rather than VHDL and Verilog. Vivado HLS converts C programming language code to VHDL and Verilog. This allowed us to quickly implement the new design and accelerate the hardware-friendly functions. Vivado HLS converts the code and saves our time because if we needed to develop that entire architecture with VHDL and Verilog languages, we would probably waste significantly more time.

Regarding AMD Vivado Design Suite's AI capabilities and security, I think there is no problem. I especially trust the output from AMD Vivado Design Suite because it tells me exactly what the problem is with my implementation. It shows me warning information, and when I read that information or error output, I can easily solve my problem and try again. I do not think there is anything else that could be improved with AMD Vivado Design Suite. My advice to others looking into using AMD Vivado Design Suite is that if it is not necessary to continue with VHDL or Verilog programming, I would recommend using Vivado HLS. I would rate my overall experience with AMD Vivado Design Suite as an 8 out of 10.

I used AMD Vivado Design Suite to develop an optimized data acquisition platform using triple modular redundancy for a custom IP in aerospace research.

Previously, we worked on Quartus from Altera, but we migrated to AMD Xilinx FPGAs, which led me to use AMD Vivado Design Suite.

I only used AMD Vivado Design Suite for educational purposes, so there was no billing involved.

I really value the speed of use of the IP Integrator in AMD Vivado Design Suite.

I would love to see fewer software bugs, better documentation, and more intuitive use cases to improve AMD Vivado Design Suite.

In the design suite, I have always encountered a problem with uploading programs through Vitis IDE.

The design suite is very effective for its intended purpose, but it has many software bugs and is sometimes counter-intuitive, which makes the workflow worse. This is why I gave it a rating of 7 out of 10.

Regarding one bug, my mentor searched for information or reported it to the Vivado team, but he did not receive a response.

There are no improvements needed for AMD Vivado Design Suite that I have not already mentioned.

I advise others looking into using AMD Vivado Design Suite to approach it with patience and be prepared for a steep learning curve. My overall rating for this product is 7 out of 10.

I mainly use AMD Vivado Design Suite for creating designs for AMD's Zynq SoC FPGAs. I tried creating a video pipeline for a Zynq design on the Zybo ZC10 board to capture video coming from an IMX219 and display it on an HDMI monitor using AMD Vivado Design Suite. I use AMD Vivado Design Suite to generate bit streams for AMD's FPGAs, and it is the most user-friendly FPGA tool compared to its competitors' tools.

The best features of AMD Vivado Design Suite is that it is a mature tool with a very good GUI. The most fascinating feature is its block design feature, which allows me to add and drop various IPs from AMD Vivado Design Suite's IP catalog and create a block design for my video designs. That is the one feature that I find very interesting.

It is also very easy to source control AMD Vivado Design Suite projects using Git. The IP catalog is another valuable feature, and it is a very good tool that I install on all of my employees' project devices.

I think the build times in certain projects are an area for improvement. When the design gets bigger, the build times to generate the bitstream can take hours. The algorithm to generate the bitstream could be improved, and that is the only reason it is not a perfect 10 for me.

I have been using AMD Vivado Design Suite for almost four years now.

It is pretty much scalable; it depends on your size. If you have enough space to install the tool, then you can install it.

The customer support is very good for AMD Vivado Design Suite. I am happy with the AMD customer support available online. You get accurate responses to your queries from AMD customer support, and I am satisfied with that.

There is no other alternate for AMD's FPGA board.

I cannot comment on any of the AI capabilities of AMD Vivado Design Suite because I have not used that yet for my personal projects. I have not used any of the latest AI features available in AMD Vivado Design Suite. I would recommend AMD Vivado Design Suite for any new FPGA designer. I give this product a rating of 9.