AWS for Industries

Siemens EDA’s Calibre nmDRC on Amazon EC2 X2iezn achieves high-performance and resource savings


This blog will help you understand how you can utilize Amazon EC2 X2iezn instances to expedite the semiconductor physical verification process using Calibre Physical Verification tools from Siemens EDA. As semiconductor devices increase in density and complexity, the physical verification phase of the chip design process requires compute nodes with increasingly high memory-to-core ratio, and larger numbers of high-performance cores to ensure the chip is ready for fabrication.

Amazon EC2 X2iezn proves to be a good fit to meet the compute and memory requirements for Calibre Physical Verification software tools.

Siemens EDA and Amazon Web Services (AWS) collaborated to evaluate the performance of Calibre Physical Verification workloads on AWS. An high-performance computing (HPC) cluster environment was provisioned on the AWS cloud with Amazon EC2 instances serving as the compute nodes and Amazon FSx for Lustre used as the persistent storage on shared file systems to maintain data distribution.

As background, the semiconductor industry has largely standardized the process to bring a chip to market, including the use of physical verification software that is used to validate the chip design and its intended physical implementation on a silicon wafer. The chip design and verification process is complicated, and requires that semiconductor companies produce a design that a chip manufacturer can successfully fabricate, with high yields and meeting target performance, power, and other factors.  Once the design is given to the manufacturer, the time to achieve high-volume manufacturing may take weeks or months, meaning that any issues not found during physical verification can have critical schedule implications. Verification is therefore critical to ensure a functioning, manufacturable system-on-chip (SoC), or any other complex integrated circuit (IC). A basic building block of most chips today, called an Intellectual property (IP) core, is licensed by either the chip designer or by third-party IP providers. Starting from the customer specifications to the final design, Electronic Design Automation (EDA) tools are used by engineers to design the chip and its constituent IP cores. Once designed, the chip goes through several levels of verification, to include physical verification, before the design can be sent for manufacturing.

Physical verification is a complex process involving multiple tools to ensure the manufacturability of the chip. In this blog we focus on one physical verification tool: Calibre nmDRC by Siemens EDA. The Calibre Physical Verification nmPlatform tools cover almost all physical design flows available today. The Calibre nmDRC tool utilizes innovative core algorithms for advanced data processing that optimizes single CPU and multi-CPU performance to verify blocks and full chips at a very high speed, ensuring accuracy of results for first time success.

Siemens EDA takes inputs from semiconductor manufacturers (aka foundries) to continuously optimize the design kits to ensure best coverage and optimum run time performance. For example, tools like Xpedition package designer interfaces with Calibre tools to launch physical verification runs.

Traditionally all physical verification workloads have been run in on-premises data centers. With the on-going increased demand for ICs, time to market delays are unacceptable. With AWS’ massively scalable IT infrastructure, it makes running these large, complex high-performance computing simulations on cloud faster. The AWS pay-as-you-go approach ensures that you only pay for what you consume rather than spending thousands of dollars on setting up a data-center.

The Amazon EC2 X2iezn instance type, launched in 2022, is powered by second generation Intel Xeon Scalable processors offering an all-core turbo frequency of 4.5 GHz. The combination of high single-threaded compute performance and a 64:1 ratio of memory to physical core making X2iezn instances an ideal fit for EDA workloads including physical verification, static timing analysis, power sign-off, and full chip gate-level simulation.

Performance Testing of Calibre nmDRC on AWS

Calibre nmDRC is a tool for Physical Verification used widely in the EDA industry. The Calibre Physical Verification tools significantly reduces verification cycle times, even as IC device counts ascend to the hundreds of millions. The Calibre tools offer fast, reliable design rule checking (DRC), layout compared to schematic (LVS) and electrical rule checking (ERC) on flat and hierarchical designs. Calibre tools are also design-style independent, allowing them to integrate easily “out-of-the-box” with various design methodologies, flows and tools. As a result, Calibre has not only been chosen by a majority of engineers for deep submicron verification, it is also physical verification internal/sign-off tool for the world’s semiconductor foundries, fabs, library companies and IP providers.

Siemens EDA collaborated with AWS to compare Calibre nmDRC v2021.3 performance by running it on various EC2 instance types. The choice of instances was primarily based on CPU core count and memory. Tests ran in a HPC cluster configuration with dynamic resource management using AWS Parallel Cluster orchestration. The cluster configuration included one primary node and multiple remote nodes to take advantage of Calibre nmDRC’s scalability—resulting in a faster turnaround time.

Calibre nmDRC utilized 24 to 32 physical cores on the primary node, which is used to manage all remote nodes used in the run. For remote nodes, the number of cores required varied by the size and complexity of the design with a minimum requirement of 16 cores per instance.

The results shown below were based on two 7nm process design kits (PDK).

Two designs with following sizes were used to determine the run times:

  • For Design 1, we used a medium sized CPU (200 mm2) design, with a cluster of 264 cores for remote instances.
  • For Design 2, we used a large sized CPU (500 mm2) design, with a cluster of 528 cores for remote instances.

These metrics were chosen to compare both, a small and medium design, chip workloads.

Calibre nmDRC was run against three scenarios for each design to compare the performance. The combination of nodes was selected in the following pairs. The baseline configuration already existed in the cloud environment.

Primary node: X1.16xlarge (32 cores, 1TB memory, 2.3 GHz clock speed)
Remote node: z1d.12xlarge (24 cores, 384 GB memory, 4.0 GHz clock speed)

Primary: X2iezn.12xlarge (24 cores, 1.5 TB memory, 4.5 GHz clock speed)
Remote: X2iezn.12xlarge (24 cores, 1.5 TB memory, 4.5 GHz clock speed)

Primary: X2iezn.12xlarge (24 cores, 1.5 TB memory, 4.5 GHz clock speed)
Remote: z1d.12xlarge (24 cores, 384 GB memory, 4.0 GHz clock speed)

The following table summarizes the results of the experiments conducted:

Design 1: (Chip Area 200mm2)

Design 2: (Chip Area 500mm2)

Comparison of run times for both the designs:

Graph showing improvements as compared to baseline:

In Scenario-A where X2iezn was used for both primary and remote nodes, Design 1 resulted in a 14% improvement in run time compared to the baseline, whereas Design 2 showed a speedup of 8.5%. The remote nodes were equipped with four times more memory than needed. This configuration resulted in the best performance from a straight-line-speed analysis.

In Scenario-B where X2iezn was used for the primary node and z1d for the remote nodes, Design 1 runtime was 10.2% faster compared to baseline, while Design 2 showed a speedup of up to 3.8%. The memory utilization of remote memory nodes in this scenario proved that memory was adequate and no memory was wasted. This configuration proved to be a more balanced option between performance, availability and cost.


Customers who run physical verification workloads can now use the new Amazon EC2 X2iezn instances from AWS to obtain up to a 14% faster performance compared to the X1 platform. Using a combination of Amazon EC2 X2iezn and z1d instances with Siemens EDA Calibre nmDRC results in significant performance improvement and resource savings.

Customers can choose to run workloads in a heterogenous configuration with Amazon EC2 X2iezn as the primary node only or with Amazon EC2 X2iezn as the primary node and z1d as remote nodes to gain up to a 10% faster performance with more value compared to the all X2iezn configuration. With its high memory to core ratio, and large number of cores on a single instance, X2iezn was proven to be a good fit to meet Calibre nmDRC’s compute requirements.

For further information, contact your AWS sales representative. For more information about Siemens Calibre nmDRC, visit the Siemens webpage and for more information about EDA workloads on AWS visit the AWS Semiconductor webpage.

About Siemens EDA

Siemens EDA, a segment of Siemens Digital Industries Software, is a technology leader in software and hardware for electronic design automation (EDA). Siemens EDA offers proven software tools and industry-leading technology to address the challenges of design and system level scaling, delivering more predictable outcomes when transitioning to the next technology node.

About Amazon Web Services (AWS)

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Azim Siddique

Azim Siddique

Azim Siddique is a Senior Solutions Architect at AWS where he works with Enterprise customers on their Cloud adoption journey. Azim has 20+ years of experience working at large global organizations in the manufacturing and industrials domain, architecting and delivering innovative solutions at scale to generate business value. Azim is passionate about being part of transformational changes driven by technological innovation.

Dwiti Pathak

Dwiti Pathak

Dwiti Pathak is a Senior Technical Account Manager at AWS based out of San Diego. She is focused on helping Semiconductor industry engage in AWS. In her spare time, she likes reading about new technologies and playing board games.

Simon Springall

Simon Springall

Simon Springall is a Cloud Software Engineer at Siemens EDA. Simon has 30 years of EDA experience in software, management and architect roles. His current learning focus is on cloud solutions architecture, HPC and cybersecurity.