AWS Quantum Technologies Blog

Designing a fault-tolerant quantum computer based on Schrödinger-cat qubits

At the AWS Center for Quantum Computing, we are doing scientific research and development on quantum computing algorithms and hardware. This post summarizes findings from our first architecture paper that describes a theoretical blueprint for a fault-tolerant quantum computer that features a novel approach to quantum error correction (QEC). Fair warning, this post dives somewhat deep into a few of the scientific details of building larger and more useful quantum computers. The level of the material is aimed at technical or science staff in the quantum computing industry and graduate-level or higher students and researchers in quantum computing. If you want to go deeper still after reading this blog post, please read the paper.

Quantum algorithms have the potential to solve practical problems in a range of areas, such as designing new materials, discovering new medicines and chemical catalysts, and optimizing logistics processes and financial portfolios. However, the quantum algorithms that are known to be useful – those that are likely to have an overwhelming advantage over classical algorithms – may require millions or billions of quantum gates. Unfortunately, quantum gates, the building blocks of quantum algorithms, are prone to errors, and such errors can accumulate quickly to spoil the result of computations.

One solution is to simply improve the quality or fidelity of quantum gates. For example, modern computer transistors perform gates with extremely low error rates – low enough to be effectively unnoticeable to users – enabling complex computations. In contrast, today’s best quantum gates suffer approximately one error in every one thousand operations. These error rates have decreased over time, but are still many orders of magnitude larger than what is needed to run high-fidelity algorithms. To reduce error rates further, researchers need to supplement approaches that lower gate error rates at the physical level with other methods such as QEC.

Summary of architecture

This post and the underlying paper “Building a fault-tolerant quantum computer using concatenated cat codes” [Chamberland et al. arXiv:2012.04108 (2020)], written by a team at the AWS Center for Quantum Computing, describes an architecture that combines elements of active QEC and passive or autonomous QEC.

Active quantum error correction is an approach for reducing gate error rates by redundantly encoding information into a protected (or logical) qubit using many physical qubits. This allows for the detection and correction of errors, and for the implementation of gate operations on the encoded qubits in a fault-tolerant way. While active QEC can yield error rates that are low enough for useful applications, it creates a large hardware overhead. This means that a quantum computer with active QEC needs a large number of physical qubits to encode every qubit of logical information. To be practical, current schemes using a square patch of surface code for QEC need more than 1,000 physical qubits for every encoded qubit [Fig 6. of Fowler et al. Phys. Rev. A 86, 032324 (2012), arXiv]. The high encoding cost of quantum codes partially results from the need to protect against both conventional bit-flip errors (when a qubit’s state flips from 1 to 0 or the reverse) and also phase-flip errors (when the sign of a superposition flips).

Passive or autonomous quantum error correction is a contrasting approach. It requires engineering a physical computing system that has an inherent stability against errors. In theory, this could be achieved by building a topological system containing Majorana modes, but a single qubit is yet to be demonstrated using this method. Other methods include engineering the quantum computer to dissipate excess energy so that it stays in low-energy qubit states used for computation. These dissipative techniques can be used to encode a single qubit in a linear oscillator, for example the “Schrödinger cat” qubit [Lescanne et al. Nat. Phys. 16, 509–513 (2020), arXiv] or the Gottesman-Kitaev-Preskill (GKP) qubit [P. Campagne-Ibarcq et al. Nature 584, 368-372 (2020), arXiv]. These types of qubits have been demonstrated in the lab.

In the architecture described in our paper, information is stored in linear harmonic oscillators using a so-called cat qubit encoding (more details on this in the deep dive below). We considered a hardware implementation where the storage oscillators are piezoelectric nanostructures, which have the advantage of being very compact. However, much work remains to be done to make the piezoelectric elements sufficiently coherent and reliable. Our analysis can also be directly applied to the case of superconducting storage resonators – a more mature technology – albeit with a few changes to the hardware parameters.

The cat qubit encoding is designed to suppress bit-flip errors. Remaining errors are taken care of by active QEC built on top of the cat qubits, employing carefully designed fault-tolerant schemes tailored to the properties of the hardware. In our paper, we constructed error models specific to the hardware we considered, and used these error models to perform simulations of the QEC stack. We then arrived at a final size estimate for simulating the Hubbard model, which is a quantum algorithm expected to have an impact in the field of materials science. We calculated that this needs 32 thousand asymmetrically-threaded superconducting quantum interference devices (SQUID). Asymmetrically threaded SQUIDs (ATS) are the superconducting components used for stabilizing cat qubits. There are more components in this architecture in addition to ATSes, but we take this number as a rough indicator of the hardware cost of running the algorithm.

The Deep Dive

In the remainder of this post, we’ll survey our main results and dive deep into four key ideas needed to understand the architecture:

  1. Cat qubits and biased noise,
  2. Multiplexed stabilization and gates,
  3. Active QEC, and
  4. Quantum logic gates.

 Cat qubits and biased noise

This section introduces cat qubits, how they can be stabilized, and the idea of biased noise, which is a key concept underpinning the architecture described in our paper.

Cat states are quantum superpositions of coherent states with opposite phases. More than two decades ago, researchers in the quantum optics community pointed out that these states can be used to encode a qubit of information in an oscillator [Cochrane, Milburn, and Munro Phys. Rev. A 59, 2631 (1999), arXiv]. For example, the computational basis states, or qubit states, can be defined as the even and odd cats – the positive- and negative-sign superpositions, respectively. In our paper, we use an alternative convention which defines the coherent states themselves as the qubit states, as shown in the Bloch sphere in Figure 1 below.

Drawing of a Bloch sphere of the cat qubit

Figure 1. Bloch sphere of the cat qubit, along with Wigner functions at four cardinal points. Wigner functions are a way of representing quantum states living in an infinite-dimensional Hilbert space. The vanishingly small overlap between the 0 and 1 states is easy to visualize in this representation, as well as the parity of the cat states. Parity is indicated by the color of the “fringe” located at the center of each color plot. Here a blue-colored fringe indicates even parity, while red indicates odd parity.

Nowadays, creating cat states in the lab is a routine task. Usually, researchers do this using microwave oscillators – either in the form of superconducting cavities or resonators on a chip – coupled to devices containing Josephson junctions. However, imperfections in real hardware make these cat states unstable, causing them to decay and dephase.

One way to fix this problem is to manipulate the system in a way that stabilizes these states, or “pins them in place” in Hilbert space. To do this with a single coherent state is easy: you simply inject energy into the oscillator, which counteracts damping and stabilizes the oscillator into a coherent state with a specific phase. But to have a working qubit, you need to stabilize both qubit states at the same time, in a way that doesn’t pick favorites.

To find a method that does this successfully, it’s useful to first understand why injecting energy to compensate damping doesn’t work. Under normal circumstances, energy driving and damping are linear processes — they occur via the addition and subtraction of individual photons. This means that the even and odd cats cannot be prepared or stabilized in this way, because cats are eigenstates of photon number parity, and parity is not preserved by linear processes. Instead, if you stabilize the oscillator by injecting and extracting photons in pairs, parity remains unchanged and the superpositions remain stable. The secret ingredient is this two-photon driving and loss. This insight was exploited in a theoretical proposal published a few years ago [Mirrahimi et. al. New J. Phys. 16, 045014 (2014), arXiv].

By now you may be asking, how are cat qubits useful? The reason cats are useful is that once the cat is stabilized by two-photon loss and driving, bit-flip errors become extremely rare while phase-flip errors become more frequent. This was recently demonstrated in the lab by a research group in Paris [Lescanne et al. Nat. Phys. 16, 509–513 (2020), arXiv]. The bit-flip rate reduction is due to the fact that the qubit states are almost perfectly orthogonal: their overlap decreases exponentially with the mean number of photons, so it’s not easy for the oscillator to jump from one to the other. The increase in phase flips is due to the natural single-photon loss in the system, but the increase is only linear in the photon number. This creates a situation where the bit-flip rate can be made orders of magnitude smaller than the phase flip rate. As we will see shortly, this noise bias is a key ingredient in our paper’s architecture.

Multiplexed stabilization and gates

In order to build an actual quantum computer out of these cat qubits, you need the ability to perform gates between them. As proposed recently [Guillaud and Mirrahimi Phys. Rev. X 9, 041053 (2019), arXiv], a universal set of gates, including X, Z, CNOT, and Toffoli gates can be performed on cat qubits using the same two-photon drive and loss mechanism. Our paper presents a detailed analysis to compute the error rates of these gates. These rates were then encapsulated into a complete error model that is fed into the repetition and surface code simulations. The key point here is that these gates are not just universal, but also bias-preserving – they do not introduce additional bit flips.

Another crucial detail is that in order to perform gates between two cats (for example a CNOT gate) or three cats (a Toffoli gate), the storage oscillators must all be coupled to the same artificial “reservoir” that is used for two-photon driving and loss. This shared reservoir is a nonlinear superconducting device that is used to perform gates and simultaneously stabilize multiple cats. We call this multiplexed stabilization. In our analysis, we find that multiplexed stabilization leads to correlated errors – or crosstalk between cats – if we’re not careful.

In the paper, we showed that there’s a nice solution to the crosstalk problem. If we only connect at most four cats to a single reservoir, then we can keep the crosstalk errors small enough that active QEC can still correct them. This “magic number” of four sets the layout and connectivity of the architecture.

Active QEC

As described above, the cat qubit will passively protect against bit-flip errors. You also need protection against phase-flip errors and any residual bit-flip errors, which can be achieved by actively correcting errors using a QEC code. The next two sections go over the active QEC and fault-tolerant logic used in our paper’s architecture.

The simplest QEC code protecting against phase-flip errors is the X-basis repetition code. This is done by measuring (X ⊗ X) between adjacent pairs of cat qubits where X is the Pauli spin operator.

The “+1” outcome for every X ⊗ X measurement indicates the qubits are in the repetition codespace (unless a measurement was faulty), and a “-1” outcome indicates a likely nearby Z error (or measurement error). In particular, each X ⊗ X measurement can be performed using an ancillary cat qubit and the cat qubit adiabatic CNOT gate that preserves the noise bias.

Graph of logical error probability for a cat+repetition architecture

Figure 2: This shows the logical error probability (lower is better) for a cat+repetition architecture as a function of the size of the repetition code. Various hardware assumptions and parameters go into this plot, including that the cat qubits have an average of 8 energy quanta (e.g. photons or phonons) and other parameter choices that are discussed in the paper. Notice the optimal performance is obtained for a code size of n=9 data qubits, above which bit-flip errors start accumulating.

This idea of combining cat qubits with a repetition code dates back to earlier work by Guillaud and Mirrahimi. However, our analysis performs a full “circuit-level” noise simulation using the exact noise model we found in our study of cat qubits, including an in-depth investigation of rare bit-flip processes. For plausible hardware numbers, we found the cat+repetition approach can achieve a logical error of 2.7 x 10-8 using just a 9 data qubit code. This is greater than 5 orders of magnitude improvement compared to completely unprotected qubits. We estimate that this cat+repetition architecture with just over two thousand superconducting components used for stabilization could produce a hundred logical qubits capable of reliably executing a thousand Toffoli gates. This may fit in a single dilution refrigerator using current or near-term technology and would go far beyond what we can simulate on a classical computer.

For useful algorithms that deliver quantum advantage, quantum computers need more Toffoli gates and ideally more logical qubits. And this means even lower logical error rates. Is it possible to go lower by adding more data qubits to the repetition code? Unfortunately, not. As we add qubits, the phase errors get suppressed, but bit-flips errors are unchecked and creep slowly up. For the hardware model used in this research, the 9 data qubit repetition code was optimal (see Figure 2).

To achieve lower logical error rates, we need a code that gives some bit-flip protection. The surface code is the most well-known QEC code and provides equal amounts of bit-flip and phase-flip error protection. To tailor it to our biased noise model, we considered a thin rectangular patch of surface code, rather than a square patch. We found that a very thin strip of surface code protecting against 1 bit-flip could get logical error rates low enough to support algorithms using well over a million Toffoli gates.

Quantum logic gates

This post has discussed how to build a fault-tolerant quantum memory using a combination of passive (cat) and active (repetition or surface) QEC. Next, this section considers how to perform computations while maintaining the protection of QEC. Quantum computation can be efficiently performed using just Toffoli gates and the Hadamard gate that produces superpositions. There have been previous proposals for fault-tolerant Toffoli gates in a cat+repetition architecture [Guillaud and Mirrahimi arXiv:2009.10756 (2020)], but these ideas were not compatible with our 2-dimensional chip layout and are vulnerable to the occasional bit-flip error.

The architecture paper includes not one, but two new ideas for how to perform fault-tolerant Toffoli gates. Both these ideas are compiled down to work on our 2-dimensional layout. The first idea (called bottom-up Toffoli in the paper) has a extremely small chip layout. The second idea (called top-down Toffoli in the paper) achieves even lower error rates including protection against some bit-flip errors. Combining these ideas, our analysis shows that this approach can execute algorithms using well over a million Toffoli gates and has an extremely small chip footprint.


An error-corrected quantum computer will be able to execute complex quantum algorithms despite noisy hardware that is prone to errors. The caveat, though, is that implementing quantum error correction at scale is a monumental scientific and engineering challenge, and the quantum computing field is still in the early stages of development. In particular, the resource overhead of popular approaches such as the surface code are very large, requiring hundreds to thousands of physical qubits for every encoded logical qubit.

The new architecture in our paper is based on the idea that it may be possible to encode information in a more efficient way using cat qubits. Cat qubits based on superconducting circuits have been demonstrated as a proof-of-concept by several research groups, and their highly biased error rates can be exploited when designing additional QEC. The AWS Center for Quantum Computing paper outlines a way to build a large-scale processor based on cat qubits, substantiated by simulations spanning from the component level up to the system level.

This is our team’s first architecture paper, but at Amazon we say every day is day one. If you’re interested in helping us develop quantum technologies, consider joining us at AWS. We’re hiring! Or if you want to get started with quantum computing today, you can run quantum algorithms on today’s devices through Amazon Braket.